1. Field of the Invention
The invention relates to a circuit substrate and a manufacturing method thereof. Particularly, the invention relates to a coreless circuit substrate and a manufacturing method thereof.
2. Description of Related Art
In a current semiconductor manufacturing process, a chip package carrier is one of commonly used packaging components. The chip package carrier is, for example, a multi-layer circuit board, which is mainly formed by alternately stacking multiple circuit layers and a multiple dielectric layers, where the dielectric layer is disposed between any two adjacent circuit layers, and the circuit layers can be electrically connected to each other through plating through holes (PTHs) or conductive vias passing through the dielectric layers. Since the chip package carrier has advantages of fine circuit layout, compact assembly, and good performance, it becomes a mainstream of chip package structures.
Generally, a circuit structure of the multi-layer circuit board is fabricated according to a build up method or a laminated method, so as to achieve features of high circuit density and small wiring space. Since a super-thin substrate has inadequate rigidity, a substrate with a certain thickness has to be first provided to serve as a support carrier. Then, a large amount of adhesives is coated and multiple circuit layers and multiple dielectric layers are alternately arranged on two opposite surfaces of the substrate. Then, the adhesive is removed to separate the circuit layers, the dielectric layers from the substrate, so as to form two multi-layer circuit boards separated to each other. Moreover, when the PTH and the conductive via is about to be formed, after a dielectric layer is formed, a blind hole is first formed to expose the circuit layer under the dielectric layer. Then, a copper layer is electroplated in the blind hole and on the dielectric layer through an electroplating method, so as to form another circuit layer and the PTH or the conductive via.
Since the substrate with a certain thickness hast to be provided to serve as the support carrier of a copper foil layer according to the conventional technique, if a material of the substrate is a metal material, material cost thereof is relatively high, so that manufacturing cost of the multi-layer circuit board is increased. Moreover, a large amount of adhesive is required for fixing the copper foil layer and the substrate, so that the adhesive is hard to be removed, and a production yield cannot be improved. In addition, regarding the circuit layer formed through electroplating, copper thickness evenness thereof is poor, so that when the required thickness of the circuit layer is relatively thin, a thinning process (for example, an etching process) is required to reduce the thickness of the circuit layer. Therefore, not only the manufacturing steps of the multi-layer circuit board are increased, the production yield of the multi-layer circuit board is also reduced.